Yuval Yarom
Publications Supervision
Submission History
View publications: by year; by type;
2021 decisions
CHES 2021Reject—Redacted—
Euro S&P 2021AcceptNonce@Once: A Single-Trace EM Side Channel Attack on Several Constant-Time Elliptic Curve Implementations in Mobile Platforms
IEEE MicroReject—Redacted—
USENIX Sec 2021Reject—Redacted—
2020 decisions
ACSAC 2020RejectA Queueing Solution to Reduce Delay in Processing of Disclosed Vulnerabilities
CCS 2020RejectNonce@Once: A Single-Trace EM Side Channel Attack on Several Constant-Time Elliptic Curve Implementations in Mobile Platforms
CCS 2020AcceptLadderLeak: Breaking ECDSA With Less Than One Bit Of Nonce Leakage
ICEIS 2020AcceptEnterprise Security Architecture: Mythology or Methodology?
IEEE SP 2020RejectRosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers
IEEE SP 2021Reject—Redacted—
IEEE SP 2021AcceptCacheOut: Leaking Data on Intel CPUs via Cache Evictions
IEEE SP 2021Reject—Redacted—
IEEE TDSCRevisionWebsite Fingerprinting Through the Cache Occupancy Channel and its Real World Practicality
IEEE TDSCRejectA Queueing Solution to Reduce Delay in Processing of Disclosed Vulnerabilities
IEEE TDSCAcceptWebsite Fingerprinting Through the Cache Occupancy Channel and its Real World Practicality
LNBIP EISAcceptSecurity Architecture Framework for Enterprises
MICRO 2020AcceptPThammer: Cross-User-Kernel-Boundary Rowhammer through Implicit Accesses
NDSS 2021RejectCacheOut: Leaking Data on Intel CPUs via Cache Evictions
NDSS 2021RevisionRosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers
NDSS 2021RejectNonce@Once: A Single-Trace EM Side Channel Attack on Several Constant-Time Elliptic Curve Implementations in Mobile Platforms
NDSS 2021AcceptRosita: Towards Automatic Elimination of Power-Analysis Leakage in Ciphers
RAID 2020RejectA Queueing Solution to Reduce Delay in Processing of Disclosed Vulnerabilities
S&P Mag.AcceptWhack-a-Meltdown: Microarchitectural Security Games
SSR 2020RejectA Queueing Solution to Reduce Delay in Processing of Disclosed Vulnerabilities
TPS-ISA 2020AcceptA Queueing Solution to Reduce Delay in Processing of Disclosed Vulnerabilities
USENIX Sec 2020RejectCacheOut: Leaking Data on Intel CPUs via Cache Evictions
USENIX Sec 2020RevisionPrime+Probe 1, JavaScript 0: Overcoming Browser-based Side-Channel Defenses
USENIX Sec 2021AcceptPrime+Probe 1, JavaScript 0: Overcoming Browser-based Side-Channel Defenses
2019 decisions
ACIS 2019RejectEnterprise Security Architecture: Mythology or Methodology?
CACMRevisionMeltdown: Reading Kernel Memory from User Space
CACMAcceptMeltdown: Reading Kernel Memory from User Space
CACMAcceptSpectre Attacks: Exploiting Speculative Execution
CCS 2019Reject—Redacted—
CCS 2019RevisionFallout: Leaking Data on Meltdown-resistant CPUs
CCS 2019AcceptFallout: Leaking Data on Meltdown-resistant CPUs
IEEE MicroAcceptBreaking Virtual Memory Protection and the SGX Ecosystem with Foreshadow
IEEE SP 2020AcceptRAMBleed: Reading Bits in Memory Without Accessing Them
IEEE SP 2020AcceptPseudorandom Black Swans: Cache Attacks on CTR_DRBG
IEEE SP 2020AcceptLVI: Hijacking Transient Execution through Microarchitectural Load Value Injection
USENIX Sec 2019AcceptRobust Website Fingerprinting Through the Cache Occupancy Channel
USENIX Sec 2019RejectNonce@Once: A Single-Trace EM Side Channel Attack on Several Constant-Time Elliptic Curve Implementations in Mobile Platforms
2018 decisions
ACNS 2018AcceptDrive-by Key-Extraction Cache Attacks from Portable Code
APSys 2018AcceptNo Security Without Time protection: We Need a New hardware Software Contract
ATC 2018RejectNo Security Without Time protection: We Need a New hardware Software Contract
CANDAR 2018AcceptThe Effect of Common Vulnerability Scoring System Metrics on Vulnerability Exploit Delay
CCS 2018RejectRobust Website Fingerprinting Through the Cache Occupancy Channel
ECIS 2018RejectEnterprise Security Architecture: Mythology or Methodology?
EuroSys 2019AcceptTime Protection: the Missing OS Abstraction
IEEE SP 2018AcceptAnother Flip in the Wall of Rowhammer Defenses
IEEE SP 2019AcceptSpectre Attacks: Exploiting Speculative Execution
IEEE SP 2019AcceptThe 9 Lives of Bleichenbacher's CAT: New Cache ATtacks on TLS Implementations
NDSS 2019RejectRobust Website Fingerprinting Through the Cache Occupancy Channel
TCHESAcceptCacheQuote: Efficiently Recovering Long-term Secrets of SGX EPID via Cache Attacks
USENIX Sec 2018AcceptMeltdown: Reading Kernel Memory from User Space
2017 decisions
ASPLOS 2018RejectNo Security Without Time protection: We Need a New hardware Software Contract
CCS 2017AcceptMay the Fourth Be With You: A Microarchitectural Side Channel Attack on Several Real-World Applications of Curve25519
CCS 2017AcceptTo BLISS-B or not to be — Attacking StrongSwan's Implementation of Post-Quantum Signatures
CCS 2017RejectDrive-by Key-Extraction Cache Attacks from Portable Code
CHES 2017AcceptSliding Right Into Disaster: Left-to-Right Sliding Windows Leak
Euro S&P 2018RejectDrive-by Key-Extraction Cache Attacks from Portable Code
Eurocrypt 2017AcceptModifying an Enciphering Scheme after Deployment
IEEE SP 2017RejectNo Security Without Time protection: We Need a New hardware Software Contract
IEEE SP 2018RevisionAnother Flip in the Wall of Rowhammer Defenses
JCENRevisionCacheBleed: A Timing Attack on OpenSSL Constant Time RSA
JCENAcceptCacheBleed: A Timing Attack on OpenSSL Constant Time RSA
SOSP 2017RejectTime Protection: the Missing OS Abstraction
Scientific ReportsRevisionReplacing Sanger with Next Generation Sequencing to improve coverage and quality of reference DNA barcodes for plants
Scientific ReportsAcceptReplacing Sanger with Next Generation Sequencing to improve coverage and quality of reference DNA barcodes for plants
Security and PrivacyReject—Redacted—
USENIX Sec 2017AcceptUSB Snooping Made Easy: Crosstalk Leakage Attacks on USB Hubs
USENIX Sec 2017RejectNo Security Without Time protection: We Need a New hardware Software Contract
2016 decisions
ACIS 2016RejectEnterprise Security Architecture: Mythology or Methodology?
ACSAC 2016AcceptAmplifying Side Channels Through Performance Degradation
Asiacrypt 2016RejectModifying an Enciphering Scheme after Deployment
CCS 2016Accept“Make Sure DSA Signing Exponentiations Really are Constant-Time”
CCS 2016AcceptECDSA Key Extraction from Mobile Devices via Nonintrusive Physical Side Channels
CHES 2016AcceptCacheBleed: A Timing Attack on OpenSSL Constant Time RSA
CHES 2016AcceptFlush, Gauss, and Reload — A Cache Attack on the BLISS Lattice-Based Signature Scheme
CHES 2016RejectECDSA Key Extraction from Mobile Devices via Nonintrusive Physical Side Channels
COMINDRejectEnterprise Security Architecture: Mythology or Methodology?
CRYPTO 2016RejectModifying an Enciphering Scheme after Deployment
Eurocrypt 2016RejectExploiting Transformations of the Galois Configuration to Improve Guess-and-Determine Attacks on NFSRs
IEEE SP 2016RejectEnterprise Security Architecture: Mythology or Methodology?
IEEE SP 2016RejectAmplifying Side Channels Through Performance Degradation
IJISReject—Redacted—
JCENRevisionA Survey of Microarchitectural Timing Attacks and Countermeasures on Contemporary Hardware
JCENAcceptA Survey of Microarchitectural Timing Attacks and Countermeasures on Contemporary Hardware
NDSS 2017RejectUSB Snooping Made Easy: Crosstalk Leakage Attacks on USB Hubs
NatureRejectReplacing Sanger with Next Generation Sequencing to improve coverage and quality of reference DNA barcodes for plants
Nature CommunicationsRejectReplacing Sanger with Next Generation Sequencing to improve coverage and quality of reference DNA barcodes for plants
Nature PlantsRejectReplacing Sanger with Next Generation Sequencing to improve coverage and quality of reference DNA barcodes for plants
PNASRejectReplacing Sanger with Next Generation Sequencing to improve coverage and quality of reference DNA barcodes for plants
TISSECReject—Redacted—
USENIX Sec 2016RejectAmplifying Side Channels Through Performance Degradation
2015 decisions
ACNS 2015AcceptEvaluation and Cryptanalysis of the Pandaka Lightweight Cipher
CT-RSA 2015AcceptJust a Little Bit More
HPCA 2016AcceptCATalyst: Defeating Last-Level Cache Side Channel Attacks in Cloud Computing
IEEE SP 2015AcceptLast-Level Cache Side-Channel Attacks are Practical
IEEE SP 2015RejectA Survey of Microarchitectural Timing Attacks and Countermeasures on Contemporary Hardware
2014 decisions
Asiacrypt 2014RejectJust a Little Bit More
CHES 2014Accept“Ooh Aah ... Just a Little Bit”: A Small Amount of Side Channel can go a Long Way
IEEE SP 2014RejectFlush+Reload: a High Resolution, Low Noise, L3 Cache Side-Channel Attack
USENIX Sec 2014AcceptFlush+Reload: a High Resolution, Low Noise, L3 Cache Side-Channel Attack
2013 decisions
NDSS 2014RejectFlush+Reload: a High Resolution, Low Noise, L3 Cache Side-Channel Attack
2012 decisions
OOPSLA 2012RejectS-RVM: a Secure Design for a High-Performance Java Virtual Machine
VMIL 2012AcceptS-RVM: a Secure Design for a High-Performance Java Virtual Machine
2011 decisions
APSys 2011RejectS-RVM: a Secure Design for a High-Performance Java Virtual Machine
2008 decisions
ICDSC 2008AcceptEstimating Camera Overlap in Large and Growing Networks